Buses

1. Overview of System Buses

A Bus is a set of parallel wires connecting two or more components of a computer. In the Von Neumann architecture, the CPU uses three specific buses to communicate with Main Memory (RAM).

Address Bus Unidirectional

Carries the address (location) of where data needs to be found or stored in memory.

Flow: CPU → Memory / I/O

Data Bus Bi-directional

Carries the actual data or instructions between the CPU and other components.

Flow: CPU ↔ Memory / I/O

Control Bus Bi-directional

Carries control signals (commands) from the Control Unit (CU) to coordinate all activities.

Flow: CPU ↔ All Components

2. Key Operations & Bus Width

The "width" of a bus refers to the number of parallel wires it has. This is a common exam point:

  • Address Bus Width: Determines the maximum memory capacity the CPU can address. For example, a 32-bit address bus can access $2^{32}$ addresses (4 GiB).
  • Data Bus Width: Determines how much data can be moved at once. A 64-bit data bus is faster than a 32-bit one because it can move twice as much data per clock cycle.

3. The Control Bus Signals

The Control Bus isn't just one signal; it carries many different "commands" to prevent data collisions. Common signals include:

  • Memory Read: Fetch from RAM.
  • Memory Write: Save to RAM.
  • Bus Request: Device wants to use a bus.
  • Bus Grant: CPU allows bus use.
  • Clock Signal: Synchronizes operations.
  • Interrupt Request: Device needs attention.

4. Exam-Style "How it Works"

If the CPU needs to Read data from memory:

  1. The CPU places the memory address on the Address Bus.
  2. The CPU sends a "Read" signal via the Control Bus.
  3. The Memory Unit locates the data and sends it back via the Data Bus.
⚠️ Critical Fact: The Address Bus is the ONLY one that is strictly Unidirectional. It only goes from the CPU to Memory. The CPU tells Memory where to look; Memory never tells the CPU where to look!